Connect Tech BlueStorm Multi-port Serial Adapter Instrukcja Użytkownika Pobierz pdf (Strona 11)

SPECIAL FEATURE

www.eecatalog.com/pcie 9

Laptop and Graphics Computing

PCIe 2.0 has been the new focus of graphics card performance and

laptop computing. All graphics card manufacturers include a high

performance PCI Express 2.0-featured graphics card in their product

line. Diﬀerentiation in performance between vendors is determined

by how well the PCIe ﬂow control buﬀer is managed and how host-

to-device packet eﬃciency is achieved. Tuning this performance has

become essential to competing in this market.

Laptop computers use small form factor modules like PCI Express

Minicard 2.0 and ExpressCard 2.0. Each of these modules help users

and manufacturers to upgrade the feature set of the laptop. e Mini

Card Electromechanical Speciﬁcation Revision 1.2, developed by the

PCI-SIG®, deﬁnes a small form-factor I/O card with a high-speed con-

nector that supports primarily PCI Express. Mini Card applications

include 802.11x wireless adapters, Bluetooth interfaces, Ethernet

adapters, modems, solid state drive (SSD) modules and SATA storage.

Laptop vendors have enabled a ﬂexible user upgradability option

through the new ExpressCard 2.0 standard developed by the PCMCIA.

is speciﬁcation is now part of the USB-IF portfolio, and is a small

form-factor mobile I/O card running at data rates up to 5 GT/s to sup-

port primarily PCI Express 2.0. ExpressCard applications can include

expanded system interfaces, storage and multimedia devices such as

wireless, SATA drives and SSD modules. Decisions about how to best

test laptop modules like these usually go in two directions: Testing in

laptop and testing out of laptop. Having ﬂexible test ﬁxtures can give

the developer the best of both worlds.

PCI Express Extensions

Server I/O – once limited to how many slots in its chassis – now has

the option to expand its I/O size through the PCI Express External

Cabling Speciﬁcation, developed by the PCI-SIG®. is high-speed

cabling interface is used for local networking and PCIe bus expan-

sion. Applications include split systems where there are remotely

connected I/O controllers, I/O expansion that connects diﬀerent

types of I/O form factor cards to a system, server I/O expansion card

connectivity, and connecting external graphic systems. Like any dis-

tanced connection, jitter and protocol synchronization are required

to establish good signal transmission.

Solid state drives are now becoming more popular. e storage

industry is working to create the NVMHCI server speciﬁcation that

will enable better guidelines for how PCIe-based SSD devices are devel-

oped and supported in server environments. Although a consumer

speciﬁcation is available today, many expect the server speciﬁcation

to encompass both consumer and server needs. e diﬃculty of

using indirect register schemes to manage storage communication

has been a barrier to new competition in this market. New protocol

tools that provide understandable user views by abstracting the

complex register operation make a big diﬀerence in solving problems

and meeting time-to-market requirements. e storage industry is

highly interested in SSD technology for several reasons, including

faster data access, increased longevity and reliability, less noise, non-

volatile storage, and less maintenance of failing hard drives.

Conquering the Course

Development projects based on PCIe 1.0 to 3.0 that used tools like

protocol analyzers and exercisers saw a big diﬀerence in meeting

product schedules. e key factor in deciding to use this type of

equipment for most engineers is that highly complex digital serial

transmissions can be rendered into simple-to-understand informa-

tion and veriﬁed against the PCI Express speciﬁcation. Once the

slopes of protocol interpretation and veriﬁcation are conquered the

course to debugging is fairly straightforward.

John Wiedemeier is the senior product market-

ing manager responsible for interconnect testing

technologies at LeCroy Corporation, where he has

managed the PCI Express protocol analyzer/ex-

erciser product lines. He has 22 years experience

in the computer and embedded development in-

dustries. John is a member of the PCI SIG where he serves as a

member of the PCI Express Serial Enabling Work Group. John is

also a member of the PICMG and VITA organizations promoting

test strategies for AMC and XMC mezzanine cards. He has a BS

in electronics engineering from Brigham Young University.

“New protocol tools that provide

understandable user views by

abstracting the complex register

operation make a big difference in

solving problems and meeting time-

to-market requirements.”

This trace of a PCIe 1.0 application taken with a LeCroy Oscilloscope

using the Protosync PE application shows how physical layer informa-

tion can be synchronized with high-level digital packet information.

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